Ben Fletcher is a doctoral researcher based within the Electronics and Software Systems Department of the University of Southampton, where he completed his undergraduate degree between 2013 and 2016, graduating with First Class Honours. His research interests include low power SoC and embedded system design, mixed signal circuit and system design, energy harvesting systems, and three dimensional IC design; the topic of his PhD research. His collaboration with ARM (through EPSRC’s Industrial Cooperative Awards in Science & Technology (iCASE) programme) focuses on the development of cost-effective heterogeneous 3D integration methodologies, specifically, investigating the use of contactless coupling for low-cost heterogeneous 3D integration.

Close to completing his PhD, Ben has joined us in Arm Research, Cambridge, working in the Devices, Circuits and Systems group to further his research in 3D integrated circuits (3D-ICs). His research explores an alternative to TSVs for low cost straightforward ‘Lego-like’ 3D integration, where dies can be stacked with no additional back-end fabrication processing. More specifically, investigating the use of inductive coupling to transmit data and power wirelessly between tiers in a 3D-IC, to simplify (and reduce the cost of) the die stacking process. Ben has already made an impression in Arm Research, writing a successful blog series about his work, and recently winning the prestigious IEEE ComSoc award at STEM for Britain. To learn more about Ben’s work, take a look at his blog series on 3D integration.

Ben Fletcher receives his prize at STEM for Britain. Image copyright: John Deehan Photography Ltd.

“This work makes two primary contributions that will foster future work in academia and industry. Firstly, it demonstrates a cost-effective way of building SoCs where the peripheral bus spans multiple dies. This has interesting applications where dies built in disparate process technologies can be designed into a SoC just by stacking one on top of another. Secondly, the project has achieved impressive metrics, demonstrating the smallest link-area (achieving 7.8x area reduction compared to SoTA!) whilst achieving simultaneous power and data transfer.”

Shidhartha Das – Senior Principal Research Engineer