Low-Power Circuit Design

The most important criteria for Internet of Things (IoT) sensor nodes is minimum energy operation. The lower speed requirements of these devices can bring benefits for circuit and system design.

Sensor applications are heavily duty cycled, requiring aggressive leakage mitigation techniques. Voltage scaling provides the ideal ‘knob’ to minimise energy while exploiting timing slack. However, scaling the supply voltage down to sub-threshold levels makes the design vulnerable to On-Chip Variation (OCV), lowering the yield and operational temperature range, especially in memory and latch structures which inherently rely on robust pull-up and pull-down paths where aggravated mismatch induces functional failures. In contrast, Near-Threshold Voltage (NTV) techniques allow the supply voltage to be brought close to the threshold voltage (but not below it), with a reduced impact on yield. However, this impact is still significant compared against conventional super-threshold circuits, so devices must be designed carefully.

This project aims to investigate power-efficient circuit design for IoT devices, by using NTV techniques but maintaining the robustness of logic circuits, OCV tolerance and resilience against errors with minimum performance penalty and area overhead.

The research led to co-authored publications between researchers at Arm and ECS, at PATMOS 2017 and IEEE JSSC (2018). A patent (US9985613B2) was also filed on the work.