Congratulations to Yunpeng Cai, who has successfully defended his PhD thesis entitled “Ultra-Low Power Sequential Circuit Design for Near-Threshold Voltage Systems”.
Cai developed innovative approaches to minimise flip-flop area and power, and maximise robustness. His techniques are particularly applicable to larger designs like GPUs, which can be up to 30% flip-flops by area. He also researched into improving the tolerance of flip-flips to single-event upsets.
Cai was co-supervised by Dr Alex Weddell, who commented:
“Cai’s patent and IEEE Journal of Solid-State Circuits paper are a testament to his hard work and technical abilities. We hope that Cai can now enjoy a well-earned rest, before moving on to the next step in his journey!”
His designs featured in taped-out silicon on the Pipistrelle 4 test chip. Cai undertook two internships at ARM Research, firstly for seven months to refine and tape-out his designs, then for a shorter time to complete testing after delivery of the completed silicon.
Cai’s work, in partnership with Arm Research, directly led to a granted patent and a paper published in the prestigious IEEE Journal of Solid-State Circuits. His designs are being considered for use in a range of Arm processors.