Please note that this is an alumni profile. Information is not current.
James leads the devices and circuits team in Arm Research and is an expert in low power design with 20+ patents and 15+ chip tapeouts. James joined Arm in 2007, where he was responsible for developing RTL-GDS2 reference flows for the various ARM soft processor cores. After a six month secondment to R&D to learn about state retention power gating for a Cortex-M reference flow, James joined R&D full time in early 2009. His main research interest is in deployable core and chip level power reduction, to which end he has worked on sub-threshold design, state retention power gating and margin reduction efforts. James holds an MEng from Imperial College, London.