Tokachi-4A Technology Demonstrator

This advanced state-retention power-gating demonstrator, code-name “Tokachi-4A”, contains a Cortex-M0 system control processor and a dual-core Cortex-A5 application processor subsystem, again designed as a collaboration with Arm Ltd on TSMC 65nm Low-Power process technology available.

Tokachi-4A was taped out in October 2012 and working and in characterization at the end of January 2013, and the silicon includes an alternative implementation of the IP watermarking research circuitry.

Tokachi-4A