Anand successfully defends PhD thesis

Congratulations to Anand Savanth, who has successfully defended his PhD thesis entitled “Techniques And Circuits For Ultra-Efficient Energy Harvesting Sensor Nodes”.

Anand’s research focussed on enabling efficient energy harvesting to enable the vision of a trillion sensor node Internet-of-Things (IoT). During his studies, his designs were taped-out through the Pipistrelle chip family, with circuits able to interface with cm2-scale photovoltaic cells and thermoelectric generators to power a sensor node and recharge its small battery.

His paper, “Integrated reciprocal conversion with selective direct operation for energy harvesting systems”, demonstrated a method for increasing the efficiency of these systems through opportunistically powering them directly from the harvester where conditions allow. This avoids the inefficiencies of power conversion circuitry, and allows >30% additional compute cycles under realistic indoor lighting. Measured results showed 84% peak conversion efficiency and energy neutral execution of benchmark sensor software (ULPBench) with a cold-start capability.

Anand was supervised by Dr Alex Weddell and Prof Bashir Al-Hashimi. Alex commented:

“Anand has been a remarkably technically-able student,” commented Alex. “The three patents applied for during his PhD, along with five publications (including two IEEE Transactions papers), indicate the quality of his work. Anand has made a real contribution towards future energy harvesting-powered IoT devices.”

Anand continues working at Arm Research, and is now leading a project focusing on transient computing.

Related Projects

Energy Harvesting and Integrated Power Conversion for Micro-Scale Sensor Nodes
See Project +

Related Technologies

Pipistrelle-4

Pipistrelle-4, taped-out at the end of May 2017, is the latest in a series of low-energy sensor-system chips. The chip includes circuit/system ideas from multiple PhD research students and industry, focusing on an energy and performance optimised SRAM bitcell, low-area overhead energy-efficient flip-flops and standard-cells. The chip was taped-out during Yunpeng Cai’s internship at Arm Cambridge, and includes circuits to validate his novel flip-flop design which has now been patented. The prototype chips were received at the end of September 2017, and tested successfully.

Read Article +

Pipistrelle-3

Taped out in March 2016, this chip advanced Pipistrelle-2’s design by adding forward body-bias to improve performance at low voltage as well as an autonomous dynamic voltage and frequency scaling (DVFS) control state machine for carefully sequencing clocks, regulator settings and body-bias. Additional integration of the switched-capacitor regulator and harvester has been made possible by adding numerous low–power oscillators along with further efficiency improvement and a reverse current protection scheme.

Read Article +

Pipistrelle-2

This chip advances Pipistrelle-1’s design, taking another step towards filling in the pieces required to build an autonomous minimum-energy sensor system. Low power clock sources are an important part of a minimum energy system for driving CPUs, switched-capacitor converters, power-management unit logic, wake-up timers and more. This chip takes the first step to prototyping suitable fully-integrated oscillator topologies, as well as improving on previous versions of SRAM, power and energy harvesting converters. Pipstrelle 2 Test Chip

Read Article +

Pipistrelle-1

A sub-threshold demonstrator chip, incorporating innovative features for energy harvesting and power conversion, has been designed and taped-out by Arm R&D engineers and ECS researchers. Pipistrelle-1 Minimum energy systems are important for deployable multi-billion wireless sensor networks (WSNs). This sub-threshold chip, code-name “PIPISTRELLE-1”, was designed in the TSMC 65LP process. It demonstrates power conversion and energy harvesting techniques which are critical features for realising WSN SoCs, and serves as a platform for experimenting with various energy and power management algorithms and techniques.  

Read Article +