Please note that this is an alumni profile. Information is not current.
Pranay is a Principal Research Engineer in Arm’s Devices, Circuits and Systems research group, where he leads the research thread on low-power VLSI design. Pranay joined Arm in 2007, chasing Moore’s Law working on embedded memory from 65nm to 14nm FinFET. After a six-month secondment in Research to design a subthreshold 65nm SRAM, Pranay joined Research full-time in 2015. His main research interest is low-power VLSI design, to which end he has worked on subthreshold and low-leakage logic, memories, body-biasing, clock sources, power-gating and other techniques at the intersection of custom digital circuits, synthesis and RTL design. Pranay holds an M.Sc. from Southampton, having received the Zepler prize and graduated with distinction from ECS in 2007. He received a Best Paper award at PATMOS 2016 and serves on the Editorial Review Board of Solid-State Circuits Letters and the External Advisory Board of the University of York’s Department of Electronic Engineering.