Ultra-Low Power 18-Transistor Fully-Static Contention-Free Single-Phase Clocked Flip-Flop in 65nm CMOS
Yunpeng Cai, Anand Savanth, Pranay Prabhat, James Myers, Alexander Weddell, and Tomasz Kazmierski, (2018) Ultra-Low Power 18-Transistor Fully-Static Contention-Free Single-Phase Clocked Flip-Flop in 65nm CMOS. IEEE Journal of Solid State Circuits.