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Dr Peter Harrod

Senior Functional Safety Manager

Peter Harrod has been with Arm since the company’s formation in 1990 and has worked on a variety of Arm designs over the years.¬†These have included a floating-point coprocessor,¬†CPUs ranging from ARM7DM to Cortex-A5 and debug and trace components. ¬†He has a special interest in design for test and the design of dependable systems. He is currently involved in applying the ISO 26262 functional safety standard for automotive systems to Arm’s series of R-class (real-time) processors.

He graduated from the University of the Witwatersrand with a BSc (Eng) Cum Laude in Electrical Engineering, then did postgraduate study at the University of Manchester (UMIST at the time) where he gained an MSc in Digital Electronics and a PhD. As part of his doctoral research he built an array processor using 4MHz Z80 CPUs, which were state-of-the-art at the time! At GEC Hirst Research he did his first IC design. In 1985 he moved to Austin, Texas and worked in the High-End Microprocessor group at Motorola (now Freescale) on the MC68030 and MC68040. In 1988 he joined Acorn Computers and was one of the team of 12 that became Arm. In the early days of ARM he did one of the first implementations of IEEE 1149.1 boundary scan (JTAG).

He is a Fellow of the IET and Senior Member of the IEEE. He serves on the Steering Committee of the European Test Symposium and has served on a number of programme committees.

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