Adaptive Power Management for Multicore Systems

Proposed architecture of learning power aware SoC

  • Power management policies exist, but these typically reduce performance or result in small power savings
  • As some components in the system may be unused or clocked at higher frequencies than needed, some power savings can be achieved
  • Energy saving opportunities can be found using adaptive Power Management HW for low-level control, without penalising overall performance
  • The strategy for the design is to have low-level, localised Power Management per core
  • Machine Learning is at HW (low-level control, fast response)
  • Pattern characterisation is based on scheduling, workload, requests and deadlines
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